Chiplet cOOling solutions for Low-consumption emBedded pRocessing AI at Nanoscalebroad
COOLBRAIN · Horizon Europe grant · 2025-10-01–2029-09-30
EC contribution
Total cost
Beneficiaries
About the data
Source: CORDIS (official EU open data), Horizon Europe. Framework HORIZON · call HORIZON-EIC-2024-PATHFINDERCHALLENGES-01 · scheme HORIZON-EIC · topic HORIZON-EIC-2024-PATHFINDERCHALLENGES-01-04. CORDIS record →
Objective
The COOLBRAIN project embarks on a pioneering journey to unleash the potential of chiplet architecture for embedded systems and smart devices, in particular to use artificial intelligence. Indeed, embedded systems face with a number of challenges when it comes to using processors with high computing, machine lThe COOLBRAIN project embarks on a pioneering journey to unleash the potential of chiplet architecture for embedded systems, in particular to use artificial intelligence. Indeed, embedded systems face with a number of challenges when it comes to using processors with high computing, such as the size and weight of cooling solutions and the total energy efficiency of the system, including its thermal management system.At its core, COOLBRAIN is focused on the development of two highly advanced and innovative solutions for the reduction of hotspots through high-performance cooling and high-efficiency energy harvesting.NEAR-FIELD SUPER-PLANCKIAN ENERGY HARVESTING: COOLBRAIN will explore all the potential of near-field super-Planckian effect to convert a maximum of the thermal energy on electricity. For it, three complementary technologies will be developed at nanoscale for the energy emission and energy reception and high-precision assembly.CHIPLET EMBEDDING PROCESS IN DIAMOND HEATSPREADER: COOLBRAIN’s expertise on diamond-based technologies will be applied to develop nanoscale diamond capping technology at low temperatures ensuring physical integrity of advanced silicon nodes technologies. In complement, advanced diamond heatspreader with conformal cavities will be developed through high-precision drilling processes. At the circuit-level, the combination of both solutions will allow to decrease the operation temperature of high-performance computing – decreasing the leakage current of very advanced silicon nodes, improving reliability and performance – and to improve the total efficiency of the system by recovering up to 30% of the thermal energy dissipated.
Beneficiaries (6)
| Organisation | Country | Role | EC contribution | SME |
|---|---|---|---|---|
| THALES | FR | coordinator | €953,408 | |
| III-V LAB | FR | participant | €689,123 | |
| UNIVERSIDADE DE AVEIRO | PT | participant | €642,392 | |
| UNIVERSITY OF BRISTOL | UK | participant | €584,688 | |
| DIAMFAB | FR | participant | €582,410 | Yes |
| INSTITUTO DE TELECOMUNICACOES | PT | participant | €519,125 |
Get the DFM funding briefing — free
New EU defence calls, tenders and awards in your inbox.
Defence Finance Monitor is an analytical and informational product. Grant data is official CORDIS; payment and subscription happen on DFM Analysis.